Scholarly record
OPTIMIZATION STRATEGIES FOR HIGH-LEVEL SYNTHESIS OF CONVOLUTIONAL NEURAL NETWORKS HARDWARE ACCELERATORS
Abstract
There are many problems related to image processing and analysis that could be solved using convolutional neural networks (CNN). It's easy to implement CNN using one of thousand high-level programming languages. Such CNN will not be fast and energy efficient enough to be used in real-time systems. The good way to solve this problem is to use special hardware accelerators (neuroprocessors). The paper shows that it is possible to reduce the calculation time of the network using neuroprocessors. The implementation of such hardware is quite challenging process that requires specialized knowledge. That's why we need a tool for automated hardware synthesis. The basis of this tool are various optimizations that will allow us to transfer the network to a hardware platform. The optimization mechanisms in existing tools are either very poor or nonexistent. We propose several optimizations on different stages of developing process of target hardware. In the paper the authors describe a CNN model for handwritten digits recognition and show how to reduce the number of neural network parameters without significant accuracy losses. The authors managed to reduce the number of parameters from 644 120 to 31 530 with accuracy loss just about 0.43%, making the CNN suitable for synthesis on dedicated hardware platform. The authors also examined the dependence of the target platform resources on the method of computing the neural network output (sequentially / pipelined / parallel). It was showed that it is possible to decrease computation time in 7 times using fully parallel computations, bit it required in 4-6 times more resources than using sequential calculations. Using the above, as well as many other optimizations, it allows to create a tool for automated synthesis of high-quality hardware accelerators for CNN. The paper also presents the concept of such tool.
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References5
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